Throughout the specification (including in the claims) the terms "video data" and "video signal" are used to denote any of the broad class of image signals indicative of pixels of an image, including analog image signals and digital image signals. In conventional video signal processing, an operation known as downstream keying (DSK) is often performed. The term "downstream" refers to the fact that this operation is usually the last in a sequence of video processing operations before final distribution of a processed video signal (e.g., broadcast transmission or distribution in the form of a master video tape). A DSK operation conventionally includes two stages: first, a video mixing operation of the type known as a "key" or "keying" operation, in which pixels of a first video signal are selectively combined with or replaced by pixels of another video signal (typically, titles are overlayed over frames of the first video signal); and second, a "fade to black" mixing operation in which the output signal from the first stage is mixed in a controlled manner with a black video signal.
FIG. 1 is a diagram of conventional digital circuitry for implementing the two stages of a conventional DSK operation. Mixer circuit 5 of FIG. 1 performs a video mixing (keying) operation (the first stage of the DSK operation) to generate a stream of output pixels having values v.sub.k =(1-.beta.)a.sub.k +(.alpha.)b.sub.k, in response to three input data streams: a stream of input pixels a.sub.k (of a first video signal V), a stream of input pixels b.sub.k (of a second video signal C), and a stream of key values .alpha.(a key signal). Each key value .alpha. of the key signal has a value in the range from 0 to 1.0.
When .alpha.=0, the first video signal is passed through circuit 5 to "fade to black" mixing circuit 11. As .alpha. increases toward the value 1.0, the pixels of the output of circuit 5 represent a proportionally increasing amount of the first video signal and a proportionally decreasing amount of the second video signal. At the upper limit, .alpha.=1.0, the second video signal is passed through circuit 5 to circuit 11. A static value for .alpha. causes the output of circuit 5 (when displayed) to appear as a blend of the first and second video signals. .alpha. can be stepped in value (between each video field) to achieve a crossfade from the first to the second video signal. The fade rate is controlled by the amount by which .alpha. is stepped between each video field.
There is no restriction on the dynamic behavior of .alpha.. The value of .alpha. may be changed at a very high frequency (pixel rate) to selectively blend the two input video pixel streams, thereby achieving patterned selection and blending of the two input images over the output video raster.
The FIG. 1 circuit can derive .alpha. from the second input video signal (for example, when the latter signal determines insert pictures or titles to replace portions of each frame of the first video signal). In this case, key selector switch 1 is controlled (for example, in response to a control signal from processor 3) to pass through the second input video signal (labeled "insert picture" in FIG. 1) to key processor 3, so that processor 3 can derive .alpha. therefrom. In this case, .alpha. is known as a "self key" signal.
Alternatively, .alpha. can be derived from another video signal (e.g., from the signal denoted "external key video" in FIG. 1). In this case, key selector switch 1 is controlled to pass through the external key video signal to key processor 3, so that processor 3 can derive .alpha. therefrom. In this case, .alpha. is known as an "external key" or "alpha key" signal.
"Fade to black" mixing circuit 11 of FIG. 1 performs a video mixing operation (the second stage of the DSK operation) to generate a stream of output pixels u.sub.k =(1-.beta.)v.sub.k +.beta.B, in response to three input data streams: a stream of pixels v.sub.k (the output of circuit 5), a stream of pixels B (of a "black" video signal or other single-color video signal), and a stream of values .beta.. Each value .beta. is in the range from 0 to 1.0.
Processor 2 controls the transfer of pixels B from storage circuit 7 to one input terminal of circuit 11. Processor 2 also controls the writing of values .beta. into register 9, and the transfer of values .beta. from register 9 to a second input terminal of circuit 11. A third input terminal of circuit 11 receives pixels v.sub.k from circuit 5.
In typical cases in which .beta. has a constant value for each frame of pixels v.sub.k, the output of circuit 11 is a video signal which, when displayed, will be a static mixture of a black (or other solid color) image determined by pixels B, and an image determined by a frame of pixels v.sub.k. As .beta. is stepped in value with each frame of pixels v.sub.k, the proportion of the mixture of black (or other color), and the image determined by the current frame of pixels v.sub.k, changes.
In typical operation of FIG. 1, the first video signal (denoted "background picture" in FIG. 1) consists of frames of pixel data, each frame determining a picture on which the key is to be superimposed. The second video signal (denoted "insert picture" in FIG. 1) consists of pixels determining the fill pattern of the key. In the case that a title is to be superimposed on the background picture, the pixels of the insert picture represent a solid color or pattern (or areas of color or pattern) with which the title will appear to be "painted."
Sometimes the insert picture consists of frames of pixel data. If each of such frames were displayed, it would appear as a title surrounded by a field of black pixels. The key (.alpha.) can readily be determined from such an insert picture.
As mentioned above, if the key (.alpha.) is not determined from the insert picture, then it is determined from an "external key video" signal. In the case that a title is to be superimposed on the background picture, the external key video signal is typically a stream of data values which determine a sequence of antialiased character outlines. Antialiasing is a slightly soft letter shape to allow a small amount of blending around the boundary between pixels of the insert picture and pixels of the background picture. This antialias blending reduces the jagged appearance of the characters of the title in the final output image.
Processor 2, typically a microprocessor based computer circuit, implements the control system for the FIG. 1 circuit. Processor 2 generates the below-discussed parameters (or an array of look-up-table values generated using some of them) and provides these to circuits 3, 7, and 9, in response to human interface input.
Key processor 3 converts a normal video signal into a key signal. There are several commonly used control parameters for a key processor, including clip level (c.sub.k), key gain (g.sub.k), and key insert (I.sub.k). The clip level control adjusts the threshold on the key video which produces an insert. The key gain control adjusts how quickly an increasing level of the key video will translate to pixels .alpha. of the key signal reaching their upper limiting value of 1.0. The key insert (I.sub.k) determines the level of opacity of the insert pixels (upper limit value of .alpha.).
As shown in FIG. 1, key processor 3 outputs a value .alpha. of the key signal in response to one value each of clip level c.sub.k, key gain g.sub.k, key insert I.sub.k (loaded from processor 2), and one pixel v of the external key video signal or insert picture signal (received from switch 1) in accordance with the equation: EQU .alpha.=I.sub.k *clip(g.sub.k *(v-c.sub.k)).
In this equation, the function clip (x) has a domain determined by the values which g.sub.k, v, and c.sub.k may have. The range of the function clip (x) is the interval from 0 to 1.0, inclusive. The range of key insert I.sub.k is also the interval from 0 to 1.0, inclusive. Key insert I.sub.k thus adjusts the maximum value of .alpha., to set the maximum blending level. By scaling the range of the key signal (the range of possible values of .alpha.), the transparency of the key is controlled. By changing I.sub.k on a field-by-field basis, a title key can be faded in or out of the background picture.
While key processor 3 can be implemented with arithmetic circuit elements, it is usually not implemented in this manner in a digital video environment. Rather, where the video input to processor 3 (from switch 1) is a stream of digital pixels having a relatively small number of discrete values (usually 256 or 1024 possible values in common video quantization schemes), it is preferably to implement processor 3 as a look-up-table (LUT). Such an LUT implementation allows an arbitrary function of the input variables (e.g., I.sub.k, g.sub.k, v, and c.sub.K) to be implemented. For example, the LUT can be loaded with a first array of values to implement a first function, and these values can then be overwritten by a second array of values to implement a different function.
The inventor has recognized that the above-described, conventional, two-stage implementation of a DSK operation (using a circuit having a conventional design of the type shown in FIG. 1) is inefficient and requires undesirably complicated and costly circuitry for implementation.